Power-Aware Computer Systems : Second International Workshop, PACS 2002 Cambridge, MA, USA, February 2, 2002, Revised Papers Paperback

WelcometotheproceedingsofthePower-AwareComputerSystems(PACS2002) workshopheld in conjunction with the 8th InternationalSymposium on High PerformanceComputerArchitecture(HPCA-8).

Improvementsincomputers- temperformancehavebeenaccompaniedbyanalarmingincreaseinpowerand energydissipation,leading tohigher costandlowerreliabilityinallcomputer systemsmarketsegments.

Thehigherpower/energydissipationhasalsosign- icantlyreducedbatterylife inportablesystems.

Whilecircuit-leveltechniques continuetoreducepowerandenergy,alllevelsofcomputersystemsarebeing usedtoaddresspowerandenergyissues.

PACS2002wasthesecondworkshopin itsseriestoaddresspower-/energy-awarenessatalllevelsofcomputersystems andbroughttogetherexpertsfromacademiaandindustry.

Theseproceedingsincluderesearchpapersspanningawidespectrumof- eas in power-aware systems.

We have grouped the papers into the following categories:(1)power-awarearchitectureandmicroarchitecture,(2)power-aware real-time systems, (3) power modeling and monitoring, and (4) power-aware operatingsystemsandcompilers.

The?rstgroupofpapersproposepower-awaretechniquesfortheprocessor pipeline using adaptiveresizing of power-hungrymicroarchitecturalstructures andclockgating,andpower-awarecachedesignbyavoidingtagchecksin- riodswhenthetagshavenotchanged. Thisgroupalsoincludesideastoadapt energyandperformancedynamicallybydetectingregionsofapplicationatr- timewherethesupplyvoltagemaybescaledtoreducepowerwithabounded decrease in performance.

Lastly, a paper on multiprocessor designs trades o? computingcapacityandfunctionalityforimprovedenergypercyclebysched- ing simple tasks on low-end and low-energy processorsand complex tasks on high-endprocessors.

Thesecondgroupofpaperstargetreal-timesystemsincludingideasonal- complexityheuristicwhichschedulesreal-timetaskssuchthatnotaskmissesits deadlineandthetotalenergysavingsaremaximized.

Theotherpapersinthis group(1)tunethesystem-levelparallelismtothecurrent-levelofpower/energy availabilityandoptimizethesystempowerutilization,and(2)performadaptive texturemappinginreal-time3Dgraphicssystemsbasedonamodelofhuman visualperceptiontoachievesigni?cantpowersavingswithoutnoticeableimage qualitydegradation.

Thethirdgroupofpapersfocusonpowermodelingandmonitoringincluding statisticalpro?lingtodetectsoftwarehotspotsofpower,andusingPetriNetsto modelDRAMpowerpolicies.

Thisgroupalsoincludesasimulatorforevaluating theperformanceandpowerofdynamicvoltagescalingalgorithms. Thelast groupconcentratesonOS and compilersfor lowpower.

The ?rst paperproposesapplication-issueddirectivestosetthepowermodesindevices suchasadiskdrive.

Thesecondpaperproposespoliciesforcluster-widepower VI Preface management.

Thepoliciesemploycombinationsofdynamicvoltagescalingand turningonando?toreduceoverallclusterpower.

PACS2002wasahighlysuccessfulforumduetothehigh-qualitysubmissions, theenormouse?ortsoftheprogramcommitteeandthekeynotespeaker,andthe attendees.

WewouldliketothankRonnyRonenforanexcellentkeynotespeech, showingthetechnologicalscalingtrendsandtheirimpactonenergy/powerc- sumption in general-purposemicroprocessors,and pinpointing recentmicro- chitecturalstrategiestoachievemorepower-e?cientmicroprocessors.

Wewould like to also thank Antonio Gonzalez, Andreas Moshovos,John Kalamatianos, andothermembersoftheHPCA-8organizingcommitteewhohelpedarrange forlocalaccomodationandpublicizetheworkshop.

February2002 BabakFalsa?andT. N. Vijaykumar PACS2002 Program Committee BabakFalsa?,CarnegieMellonUniversity(co-chair) T.

N. Vijaykumar,PurdueUniversity(co-chair) DaveAlbonesi,UniversityofRochester KrsteAsanovic,MassachusettsInstituteofTechnology IrisBahar,BrownUniversity LucaBenini,UniversityofBologna DougCarmean,Intel Yuen Chan,IBM KeithFarkas,CompaqWRL MaryJaneIrwin,PennsylvaniaStateUniversity StefanosKaxiras,AgereSystems PeterKogge,UniversityofNotreDame UliKremer,RutgersUniversity AlvinLebeck,DukeUniversity AndreasMoshovos,UniversityofToronto RajRajkumar,CarnegieMellonUniversity KaushikRoy,PurdueUniversity Table of Contents Power-Aware Architecture/Microarchitecture Early-StageDe?nitionofLPX:ALowPowerIssue-ExecuteProcessor ...1 P.

Bose,D. Brooks,A. Buyuktosunoglu,P. Cook,K. Das,P. Emma, M. Gschwind,H. Jacobson,T. Karkhanis,P. Kudva,S. Schuster, J. Smith,V. Srinivasan,V. Zyuban,D. Albonesi,andS. Dwarkadas DynamicTag-CheckOmission: ALowPowerInstructionCacheArchitecture ExploitingExecutionFootprints ...18 KojiInoue,VasilyMoshnyaga,andKazuakiMurakami AHardwareArchitecture forDynamicPerformanceandEnergyAdaptation...33 PhillipStanley-Marbell,MichaelS.

Hsiao,andUlrichKremer Multi-processorComputerSystemHavingLowPowerConsumption ...53 C.

MichaelOlsenandL. AlexMorrow Power-Aware Real-TimeSystems AnIntegratedHeuristicApproach toPower-AwareReal-TimeScheduling...68 PedroMejia,EugeneLevner,andDanielMoss'e Power-AwareTaskMotionforEnhancingDynamicRange ofEmbeddedSystemswithRenewableEnergySources ...84 JinfengLiu,PaiH.

Chou,andNaderBagherzadeh ALow-PowerContent-AdaptiveTextureMappingArchitecture forReal-Time3DGraphics ...99 JeongseonEuh,JeevanChittamuru,andWayneBurleson Power Modelingand Monitoring Energy-DrivenStatisticalSampling:DetectingSoftwareHotspots ...110 FayChang,KeithI.

Farkas,andParthasarathyRanganathan ModelingofDRAMPowerControlPolicies UsingDeterministicandStochasticPetriNets ...130 XiaoboFan,CarlaS.

Ellis,andAlvinR. Lebeck SimDVS:AnIntegratedSimulationEnvironment forPerformanceEvaluationofDynamicVoltageScalingAlgorithms ...