Formal Verification of Structurally Complex Multipliers
Alireza Mahzoon
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Formal and Practical Techniques for the Complex System Design Process using Virtual Prototypes : Better Early than Never
Pascal Pieper
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Design fur Testbarkeit, Fehlersuche und Zuverlassigkeit : Manahmen der nachsten Generation unter Verwendung formaler Techniken
Sebastian Huhn
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In-Memory-Computing : Synthese und Optimierung
Saeideh Shirinzadeh
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Automatisierte Analyse von virtuellen Prototypen auf der Ebene elektronischer Systeme : Design, Verstandnis und Anwendungen
Mehran Goli
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A Computer-Aided Design and Synthesis Environment for Analog Integrated Circuits
Geert Van der Plas
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High Quality Test Pattern Generation and Boolean Satisfiability
Stephan Eggersglu
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Symbolic Analysis for Automated Design of Analog Integrated Circuits
Georges Gielen
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Systematic Modeling and Analysis of Telecom Frontends and their Building Blocks
Piet Vanassche
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High-Level Modeling and Synthesis of Analog Integrated Systems
Ewout S. J. Martens
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Binary Decision Diagrams : Theory and Implementation
Rolf Drechsler
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Analog Layout Generation for Performance and Manufacturability
Koen Lampaert
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Automated Analysis of Virtual Prototypes at the Electronic System Level : Design Understanding and Applications
Mehran Goli
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Automated Analysis of Virtual Prototypes at the Electronic System Level : Design Understanding and Applications
Mehran Goli
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Enhanced Virtual Prototyping : Featuring RISC-V Case Studies
Vladimir Herdt
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Enhanced Virtual Prototyping : Featuring RISC-V Case Studies
Vladimir Herdt
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Design for Testability, Debug and Reliability : Next Generation Measures Using Formal Techniques
Sebastian Huhn
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Design for Testability, Debug and Reliability : Next Generation Measures Using Formal Techniques
Sebastian Huhn
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Time-encoding VCO-ADCs for Integrated Systems-on-Chip : Principles, Architectures and Circuits
Georges Gielen
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